74LS193 DATASHEET PDF

74LS193 DATASHEET PDF

This circuit is a synchronous up down 4-bit binary counter. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs. 74LS Synchronous 4-Bit Binary Counter with Dual Clock. General Description. The DM74LS circuit is a synchronous up/down 4-bit binary counter. The DM74LS circuit is a synchronous up/down 4-bit binary counter. Synchronous operation is provided by hav- ing all flip-flops clocked simultaneously.

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Synchronous 4-Bit Binary Counter With Dual Clock

This mode of operation eliminates the output counting. The counter is fully programmable; that is, each output may. Synchronous operation is provided by hav.

This feature allows the counters to be used as modulo-N dividers by simply modi- fying the count datasheef with the preset inputs.

datasyeet This feature allows the. The clear, count, and load inputs are buffered to lower the drive requirements of clock drivers, etc. Similarly, the carry output produces a pulse equal in width.

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The outputs of the four master-slave flip-flops are triggered.

The counter is fully programmable; that is, each output may be preset to either level by entering the desired data at the inputs while the load input is LOW. Features s Fully independent clear input datashset Synchronous operation s Cascading circuitry provided internally s Individual preset each flip-flop Ordering Code: Both borrow and carry outputs are available to cascade both the up and down counting functions.

Synchronous operation is provided by hav- ing all flip-flops clocked simultaneously, so that the outputs change datasbeet when so instructed by the steering logic. Both borrow and carry outputs.

These counters were designed to be cascaded without the need for external circuitry. The counters can then be easily cascaded by feeding the borrow and carry outputs to the count down and count up inputs respectively of the succeeding counter.

A clear input has been provided which, when taken to a high level, forces all outputs to the low level; independent of the count and load inputs. Similarly, the carry output produces a pulse equal in width to the count down input when an overflow condition exists. Fairchild Semiconductor Electronic Components Datasheet.

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74LS193 Datasheet

The output will change independently of the count pulses. A clear input 74s193 been provided which, when taken to a. The output will change. The counters can then be easily cascaded by feeding the. This mode of operation eliminates the output counting spikes normally associated with asynchronous ripple- clock counters.

View PDF for Mobile. The clear, count, and load.

Datasheet(PDF) – Fairchild Semiconductor

These counters were designed to be cascaded without the. The direction of counting is determined by which.

The borrow output produces a pulse equal in width to the count down input when the counter underflows. The borrow output produces a pulse equal in. The direction of counting is determined by which count input is pulsed while the other count input is held HIGH.